Motor control circuit and associated full bridge switching arrangement

ABSTRACT

A motor control circuit for controlling a motor, the circuit comprising a switched mode power supply operable to drive a full bridge switching transistor arrangement and to provide a stable voltage to the motor control circuit, wherein the switching transistor arrangement is connectable to the windings of the motor to be controlled, and wherein the switching transistor arrangement comprises: a first set of transistors in an upper part of the full bridge and a second set of transistors in a lower part of the full bridge, the first set of transistors being driven by a first output of the switched mode power supply and the second set of transistors being driven by a second output of the switched mode power supply.

[0001] This invention relates to a motor control circuit andparticularly to a motor control circuit for a brushless DC motor controlcircuit.

[0002]FIG. 1 of the accompanying drawings is a schematic circuit diagramof a conventional DC brushless motor control circuit for use inapplications such as air moving fans requiring relatively low power, lowvoltage DC.

[0003] In the motor control circuit of FIG. 1, a supply voltage is fedto a top rail, for example between 18 to 32 volts DC or 36 to 60 voltsDC depending on the motor requirements. The motor windings 1 areconnected to a full bridge circuit consisting of four n-type FETs 2 a,2b,2 c,2 d driven by a pair of charge pump circuits (IR2104) 3 a,3 b. Thecharge pump circuits each receive a direct feed from a DC motorcontroller IC 4 such as a INT 100 and are each connected to the top railvoltage supply by a respective capacitor 5 a,5 b. The outputs H1, H2,L1, L2 of the controller IC 4 are connected to the bridge.

[0004] A voltage regulator 6 comprising a linear DC-DC convertersupplies the controller IC 4 with 12 to 15 volts DC. However, a voltagehigher than the top rail must be provided to turn on the two FETs 2 a, 2b in the top half of the full bridge, hence the need for the charge pumpcircuits for the FETs in the top half of the full bridge. The drains ofthe FETs in the bottom half of the bridge are connected to a resistor 7to provide an output for sensing the current being drawn by the motorwindings 1. The resistor 7 is connected to the current sense input ofthe IC4.

[0005] The n-type FETs can be replaced with p-type FETs but these areexpensive, not readily available and less efficient than n-type PETs.

[0006] There are problems associated with the circuit of FIG. 1 andother conventional motor control circuits which utilise charge pumpcircuits for driving the FETs 2 a,2 b and a linear DC-DC regulator toprovide a stable voltage to the control circuit. Charge pump circuitsrequire bulky, expensive components and are not very efficient attransferring energy. In a motor control application the linear DC-DCregulator circuit has to generate a stable voltage over a wide inputvoltage range. Adherence to this requirement results in a design whichis inefficient at high supply voltage levels. Effectively, the voltageregulator must be over-specified to drive the charge pump circuits,thereby causing the voltage regulator to generate too much energy whichrequires dissipation. It is always inconvenient to dissipate heat fromthe confines of an enclosure housing a motor and its associated controlcircuitry, let alone having to dissipate heat from an over-specifiedvoltage regulator.

[0007] It is an object of the present invention to seek to overcome theabove-mentioned difficulties and provide a motor control circuit whichdoes not require the use of charge pump circuits.

[0008] Accordingly, one aspect of the present invention provides a motorcontrol circuit for controlling a motor, the circuit comprising aswitched mode power supply operable to drive a full bridge switchingtransistor arrangement and to provide a stable voltage to the motorcontrol circuit, wherein the switching transistor arrangement isconnectable to the windings of the motor to be controlled, and whereinthe switching transistor arrangement comprises: a first set oftransistors in an upper part of the full bridge and a second set oftransistors in a lower part of the full bridge, the first set oftransistors being driven by a first output of the switched mode powersupply and the second set of transistors being driven by a second outputof the switched mode power supply.

[0009] Preferably, the full bridge switching transistor arrangementcomprises a full bridge of FETs.

[0010] Preferably, one of the switched mode power supply outputs is tiedto a power supply rail having a predetermined voltage such that theeffective voltage output is the sum of the switched mode power supplyvoltage output and the predetermined voltage.

[0011] Advantageously, each of the switched mode power supply outputs istied to a power supply rail having a respective predetermined voltagesuch that the effective voltage output of the respective output is thesum of the respective switched mode power supply voltage output and therespective predetermined voltage.

[0012] Conveniently, the switching transistor arrangement comprises afirst set of transistors in an upper part of the full bridge and asecond set of transistors in a lower part of the full bridge, the firstset of transistors being connected to the first output of the switchedmode power supply via an array of switching transistors and voltagedividers.

[0013] In order that the present invention can be more readilyunderstood, embodiments thereof will now be described, by way ofexample, with reference to the accompanying drawings, in which:

[0014]FIG. 1 is a schematic circuit diagram of a conventional motorcontrol circuit; and

[0015]FIG. 2 is a schematic circuit diagram of a motor control circuitembodying the present invention.

[0016] The present invention dispenses with the problematic charge pumpcircuits 3 a,3 b used in conventional motor control circuits and asshown in the conventional motor control circuit of FIG. 1. A motorcontrol circuit embodying the present invention is shown in FIG. 2, likecomponents being accorded the same reference numerals as used in FIG. 1.

[0017] Referring to FIG. 2, the charge pump circuits are replaced by aswitched mode power supply 10. Switched mode power supplies (switchingregulators) are known in the art and are advantageous since they canaccommodate a large range of input voltages and operate at a relativelyhigh efficiency. In the past this approach has not been adopted for usein motor drive circuits particularly with motors using integralelectronics because of the expense and the relative bulk of thecomponents necessary. It has not been appreciated that a switched modepower supply could be considered or be useful in a motor control circuitfor driving the FETs 2 a,2 b and providing a stable voltage to thecontrol circuit. Indeed, switched mode power supplies are not used inmotor control circuits. It has certainly not been appreciated that aswitched mode power supply could be used as a means of circumventing theuse of a combination of a voltage regulator and charge pump circuits ina motor control circuit. Certainly, switch power mode supplies aretypically used only in higher power AC mains applications.

[0018] The switched mode power supply transformer 10 comprises a primarywinding 11 connected across the top and bottom supply voltage rails inseries with a switching transistor 12 to provide an incoming AC powersupply. The primary winding is inductively coupled to two secondarywindings 13,14 each of which is provided with a forward-biased diodebridge 15 a,15 b and a bulk capacitor 16 a,16 b connected in parallelwith the loads (i.e. the FETs 2 a,2 b, to be driven by the upper windingthrough diode 15 a and a stable control circuit voltage to be providedby the lower winding through diode 15 b). The respective voltages acrossthe bulk capacitors 16 a,16 b comprise the power supply outputs 17,18.

[0019] Specifically, the switched mode power supply outputs 17,18 areisolated, one of the outputs 17 being tied to the top supply voltagerail so that the output thereof is a predetermined voltage above the toprail voltage. The other output 18 is tied to the bottom rail (0 volts)so as to be a predetermined voltage above that. In this example, thepredetermined voltage is 12 volts above the top and bottom railvoltages. The top rail voltage can be selected to be anywhere between 18to 75. volts DC and can fluctuate between these limits depending on themotor requirements.

[0020] The connections to the FETs 2 c,2 d in the lower half of the fullbridge remain unchanged over the example shown in FIG. 1, whereas theconnections to the FETs 2 a,2 b in the upper half of the full bridge arenow made to the upper output 17 of the switched mode power supply 10 viaan array of switching transistors and voltage dividers in a conventionallevel shift circuit such that the FETs 2 a,2 b are appropriately drivento control the motor windings 1. Similarly, the other output 18 of theswitched mode power supply 10 generates a stable control circuit voltageand drives the FETs 2 c,2 d in the lower half of the full bridge throughthe controller IC 4.

[0021] In the present specification “comprise” means “includes orconsists of” and “comprising” means “including or consisting of”.

1. A motor control circuit for controlling a motor, the circuitcomprising a switched mode power supply operable to drive a full bridgeswitching transistor arrangement and to provide a stable voltage to themotor control circuit, wherein the switching transistor arrangement isconnectable to the windings of the motor to be controlled, and whereinthe switching transistor arrangement comprises: a first set oftransistors in an upper part of the full bridge and a second set oftransistors in a lower part of the full bridge, the first set oftransistors being driven by a first output of the switched mode powersupply and the second set of transistors being driven by a second outputof the switched mode power supply.
 2. A circuit according to claim 1,wherein the full bridge switching transistor arrangement comprises afull bridge of FETs.
 3. A circuit according to claim 1, wherein one ofthe switched mode power supply outputs is tied to a power supply railhaving a predetermined voltage such that the effective voltage output isthe sum of the switched mode power supply voltage output and thepredetermined voltage.
 4. A circuit according to claim 1, wherein eachof the switched mode power supply outputs is tied to a power supply railhaving a respective predetermined voltage such that the effectivevoltage output of the respective output is the sum of the respectiveswitched mode power supply voltage output and the respectivepredetermined voltage.
 5. A circuit according to claim 1, wherein theswitching transistor arrangement comprises a first set of transistors inan upper part of the full bridge and second set of transistors in alower part of the full bridge, the first set of transistors beingconnected to the first output of the switched mode power supply via anarray of switching transistors and voltage dividers.
 6. (cancelled)
 7. Acircuit according to claim 2, wherein one of the switched mode powersupply outputs is tied to a power supply rail having a predeterminedvoltage such that the effective voltage output is the sum of theswitched mode power supply voltage output and the predetermined voltage.8. A circuit according to claim 2, wherein each of the switched modepower supply outputs is tied to a power supply rail having a respectivepredetermined voltage such that the effective voltage output of therespective output is the sum of the respective switched mode powersupply voltage output and the respective predetermined voltage.
 9. Acircuit according to claim 2, wherein the switching transistorarrangement comprises a first set of transistors in an upper part of thefull bridge and second set of transistors in a lower part of the fullbridge, the first set of transistors being connected to the first outputof the switched mode power supply via an array of switching transistorsand voltage dividers.
 10. A circuit according to claim 3, wherein theswitching transistor arrangement comprises a first set of transistors inan upper part of the full bridge and second set of transistors in alower part of the full bridge, the first set of transistors beingconnected to the first output of the switched mode power supply via anarray of switching transistors and voltage dividers.
 11. A circuitaccording to claim 4, wherein the switching transistor arrangementcomprises a first set of transistors in an upper part of the full bridgeand second set of transistors in a lower part of the full bridge, thefirst set of transistors being connected to the first output of theswitched mode power supply via an array of switching transistors andvoltage dividers.